Dual lvds with different frequencies

[nvilaca]

Yes, if i disable the second screen, the main one remains equal.

[varigigi]

So, even if you connect only the 51MHz LCD, the debug messages always say that the rounded clock is 40MHz, correct?
BR
Pier

[nvilaca]

Actually no, if i have a single 7" lcd, e get correct frequency:

Code: Select all

imx-ipuv3 2400000.ipu: DC stop timeout - 0 * 10ms
imx-ipuv3 2400000.ipu: panel size = 1024 x 600
imx-ipuv3 2400000.ipu: pixel clk = 51208000
imx-ipuv3 2400000.ipu: use special clk parent
imx-ipuv3 2400000.ipu: parent ldb_di0, rate 51206400
imx-ipuv3 2400000.ipu: round pixel clk:51206400
imx-ipuv3 2400000.ipu: div:1
imx-ipuv3 2400000.ipu: DMFC high resolution has set, will not change

When i plug a 12" lcd on lvds1 i get:

Code: Select all

imx-ipuv3 2400000.ipu: panel size = 800 x 600
imx-ipuv3 2400000.ipu: pixel clk = 40000000
imx-ipuv3 2400000.ipu: use special clk parent
imx-ipuv3 2400000.ipu: parent ldb_di1, rate 51206400
imx-ipuv3 2400000.ipu: round pixel clk:51206400
imx-ipuv3 2400000.ipu: div:1


So it's consistent, the second lvds always gets the first's frequency.

PS: Inverting the display timings on the dtb, of course.

[varigigi]

Hi,
could you please check if the following patch is already integrated in your kernel ?
https://github.com/varigit/linux-2.6-im ... d659247005
If not, could you please apply and retest?
BR
Pier

[nvilaca]

No we had not, and it seems to do the trick.

Code: Select all

imx-ipuv3 2400000.ipu: panel size = 800 x 600
imx-ipuv3 2400000.ipu: pixel clk = 40000000
imx-ipuv3 2400000.ipu: use special clk parent
imx-ipuv3 2400000.ipu: parent ldb_di0, rate 39932773
imx-ipuv3 2400000.ipu: round pixel clk:39932773
imx-ipuv3 2400000.ipu: div:1


Code: Select all

imx-ipuv3 2400000.ipu: panel size = 1024 x 600
imx-ipuv3 2400000.ipu: pixel clk = 51205000
imx-ipuv3 2400000.ipu: use special clk parent
imx-ipuv3 2400000.ipu: parent ldb_di1, rate 50285714
imx-ipuv3 2400000.ipu: round pixel clk:50285714
imx-ipuv3 2400000.ipu: div:1
imx-ipuv3 2400000.ipu: IPU DMFC DC HIGH RESOLUTION: 1(0~3), 5B(4,5), 5F(6,7)


Thank you for your time. I'll try the different lcd combinations we have and get back to you if we have any issue.

[varigigi]

Thanks for the update!
BR
Pier

[nvilaca]

I've been testing, and it seems now that when i set one of the displays, the other is affected too.

For example, i wake the second display, and the both go to 51Mhz. If i then use fbset on fb0, both get back to 40 MHz (physically measured).

Should i set a different parent for each channel? If so, What clock should i use, PLL5?

[varigigi]

Sorry, but I did not understand the test sequence.
Do you mean that the 2 LVDS start with different clocks and than change to use the same frequency?
If yes, what is triggering the change?
Can you please elaborate?
BR
Pier

[nvilaca]

At this example i'm using a different second lcd, that works at 71Mhz, but sam happens with the 51Mhz.

When i turn on the system, there's only video signal on lvds0. The log:

Code: Select all

imx-ipuv3 2400000.ipu: panel size = 800 x 600
imx-ipuv3 2400000.ipu: pixel clk = 40000000
imx-ipuv3 2400000.ipu: use special clk parent
imx-ipuv3 2400000.ipu: parent ldb_di0, rate 39932773
imx-ipuv3 2400000.ipu: round pixel clk:39932773
imx-ipuv3 2400000.ipu: div:1


Measure confirms the 40Mhz.

Then i wake lvds1

Code: Select all

localhost:~# echo 0 > /sys/class/graphics/fb2/blank
imx-ipuv3 2400000.ipu: panel size = 1280 x 800
imx-ipuv3 2400000.ipu: pixel clk = 71108000
imx-ipuv3 2400000.ipu: use special clk parent
imx-ipuv3 2400000.ipu: parent ldb_di1, rate 71458646
imx-ipuv3 2400000.ipu: round pixel clk:71458646
imx-ipuv3 2400000.ipu: div:1
imx-ipuv3 2400000.ipu: IPU DMFC DC HIGH RESOLUTION: 1(0~3), 5B(4,5), 5F(6,7)

Measuring confirms the 71 Mhz, but measuring lvds0 also shows 71Mhz

I turn off lvds0

Code: Select all

localhost:~# echo 1 > /sys/class/graphics/fb0/blank
imx-ipuv3 2400000.ipu: DC stop timeout - 0 * 10ms

Lvds0 measures no signal, lvds1 is at 71 Mhz,

I turn lvds0 back on

Code: Select all

localhost:~# echo 0 > /sys/class/graphics/fb0/blank
imx-ipuv3 2400000.ipu: panel size = 800 x 600
imx-ipuv3 2400000.ipu: pixel clk = 40000000
imx-ipuv3 2400000.ipu: use special clk parent
imx-ipuv3 2400000.ipu: parent ldb_di0, rate 39932773
imx-ipuv3 2400000.ipu: round pixel clk:39932773
imx-ipuv3 2400000.ipu: div:1


Both channels are at 40 Mzh.

[varigigi]

Hi,
is this behavior reproducible also with Yocto Morty (after patching the device tree)?
BR
Pier