Camera Integration - Device Tree Settings [ANSWERED]

Moderators: Oren.R, Eran.M

schluecj
Posts: 9
Joined: Fri Sep 16, 2016 6:47 pm

Camera Integration - Device Tree Settings [ANSWERED]

Postby schluecj » Thu Sep 28, 2017 3:01 pm

I am looking for some guidance on what the device tree settings need to be for connecting a parallel camera up to the imx6 Dual.

The camera inputs (x3) are connected to an Intersil TW9990 video decoder which is then connected to the CSI0_DAT lines 12 - 19, CSI0_PIXCLK, CSI0_HSYNC, CSI0_VSYNC, I2C2_SDA, I2C2_SCL, GPIO2[31] (Interrupt request), GPIO3[31] (Reset).

I am not aware of the linux branch being used (krogoth) having support for this chip so I am under the assumption I will need to manually perform the I2C operations with that port.

At the moment the device tree that I have has the following entries related to the camera input:

Code: Select all

      pinctrl_ipu1: ipu1grp {
         fsl,pins = <
            MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK   0x10
            MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15      0x10
            MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02      0x10
            MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03      0x10
            MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04      0x80000000
            MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
            MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
            MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
            MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
            MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
            MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
            MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
            MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
            MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
            MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
            MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10   0x10
            MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11   0x10
            MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12   0x10
            MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13   0x10
            MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14   0x10
            MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15   0x10
            MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16   0x10
            MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17   0x10
            MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18   0x10
            MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19   0x10
            MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20   0x10
            MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21   0x10
            MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22   0x10
            MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23   0x10
         >;
      };

      pinctrl_ipu1_2: ipu1grp-2 { /* parallel camera */
         fsl,pins = <
            MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12      0x80000000
            MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13      0x80000000
            MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14      0x80000000
            MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15      0x80000000
            MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16      0x80000000
            MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17      0x80000000
            MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18      0x80000000
            MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19      0x80000000
            MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN   0x80000000
            MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0x80000000
            MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0x80000000
            MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC      0x80000000
         >;
      };


   v4l2_cap_0 {
      compatible = "fsl,imx6q-v4l2-capture";
      ipu_id = <0>;
      csi_id = <1>;
      mclk_source = <0>;
      status = "okay";
   };

   v4l2_out {
      compatible = "fsl,mxc_v4l2_output";
      status = "okay";
   };
   
   &mipi_csi {
      status = "okay";
      ipu_id = <0>;
      csi_id = <1>;
      v_channel = <0>;
      lanes = <2>;
   };   


I am thinking that some changes need to be made to the v4l2_cap_0 but I am unsure what, I initially tried changing the csi_id to 0 but that resulted in the system not booting and just stopping at "Starting kernel...". I also am not sure what the ipu_id should be and how the actual pins get associated with anything since in most cases I have had to associate the pinctrl_ipu1_2 with some device and I have not done that for this.

I also could use some guidance on how to verify the operation to prove out the configured hardware. I was thinking I can use gst-launch with the v4l2src and ximagesink from an xterm.

Code: Select all

gst-launch v4l2src ! ximagesink


That operation is currently producing the following error message on my console:
ERROR: v4l2 capture: slave not found!


and on the xterm where I launched the command
(gst-plugin-scanner:950): GLib-GObject_WARNING **: cannot register existing type 'GstVorbisDec'

(gst-plugin-scanner:950): GLib-CRITICAL **: g_once_init_leave: assertion 'result != 0' failed

(gst_plugin-scanner:950): GStreamer-CRITICAL **: gst_element_register: assertion 'g_type_is_a (type, GST_TYPE_ELEMENT)' failed
Setting pipeline to PAUSED ...
ERROR: Pipeline doesn't want to pause.
ERROR: from element /GstPipline:pipeline0/GstV4l2src0: Could not open device '/dev/video0' for reading and writing.
Additional debug info:
../../../gst-plugins-good-0.10.31/sys/v4l2/v4l2_calls.c(512): gst_v4l2_open ():/GstPipeline:pipeline0/GstV4l2Src:v4l2src0:
system error: Resource temporarily unavailable
Setting pipeline to NULL ...
Freeing pipeline ...

Eran.M
Posts: 140
Joined: Tue Jan 26, 2016 10:49 am

Re: Camera Integration - Device Tree Settings

Postby Eran.M » Thu Sep 28, 2017 3:08 pm

Hi schluecj.
Have you seen the following Wiki page for adding a parallel camera?
http://variwiki.com/index.php?title=VAR ... lel_camera

Regards,
Eran


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